1. Technical Field
Example embodiments relate generally to a logic circuit. More particularly, some example embodiments relate to a flip-flop that latches input data at rising edges of a clock signal and outputs latched input data as output data.
2. Description of the Related Art
Recently, according to a mobile convergence trend, there is a rising interest on a low power technology for a mobile device (e.g., a smart phone, a smart pad, etc.). Generally, since the mobile device uses a limited power such as a battery, manufacturing (or, designing) the mobile device with low power chips including low power flip-flops is necessary as well as efficient power management for the mobile device to consume low power. A master-slave flip-flop has been used for a long time because a size of the master-slave flip-flop is relatively small and the master-slave flip-flop has high reliability. However, since a conventional master-slave flip-flop includes internal nodes that are repeatedly (e.g., alternately) charged and discharged in response to a clock signal, the conventional master-slave flip-flop consumes power even while input data is not changed. Thus, the conventional master-slave flip-flop cannot satisfy the low power level that a recent mobile device of which an operating frequency is relatively high requires.